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Senior Engineer, Physical Design Engineering

Analog Devices | Yelahanka, India | Posted May 29, 2026

Position Overview

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Senior/Lead PD Engineer

ADI is looking for Senior/Lead PD Engineer for the development of complex mixed Signal SoCs. These chips are manufactured in most leading edge process nodes and high speed clock rates.

These SoCs involve multiple processor cores and speed signal processing hardware running at high speed.

Position Requirements

  • BTech/MTech degree in Electrical/Electronic from a reputed institute with 4-8 years of experience in the field of Digital place and route
  • Hands on experience with the implementation (PnR Signoff) of complex high speed SoC designs in cutting edge process technologies (22 nm, 16 nm, 7 nm, etc).
  • Hands on experience in handling the tapeout of complex high speed SoC designs in cutting edge process technologies
  • Floor Planning, Power Plan, Place and Route, Clock Planning and Clock Tree Synthesis, Parasitic Extraction...
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