Role Overview

We are seeking a Custom Analog Layout Engineer with strong hands‑on experience in advanced CMOS nodes (28nm, 22nm, and 16nm) to support the physical implementation of high‑performance analog and mixed‑signal IPs . This role focuses on full‑custom layout execution for complex analog blocks used in high‑speed and high‑performance systems, working closely with analog designers to ensure silicon quality, performance, and manufacturability across automotive and high‑reliability applications.

Key Responsibilities

Custom Analog Layout Execution

• Perform full‑custom analog layout for critical circuit blocks, including:
  • Analog Front Ends (AFEs)
  • ADCs and DACs
  • PLLs and clocking circuits
  • Voltage regulators and references
  • Analog filters and bias circuits
• Translate schematics into high‑quality, silicon‑proven layouts in advance...