Lead verification efforts at Synopsys for cutting-edge PCIe PHY technology. This remote-eligible role focuses on defining strategies and enhancing functional quality in silicon IP verification.
As a senior verification engineer, you will develop comprehensive plans for complex mixed-signal digital designs emphasizing PCIe PHY functionality. Your role involves architecting and executing advanced testbench environments and collaborating across various teams to optimize verification coverage and execution.
Key Responsibilities:
• Define and implement verification strategies for PCIe PHY IP
• Develop plans for protocol compliance and functionality verification
• Architect testbench environments for subsystem-level verification
• Analyze failures and drive solutions for complex issues
• Mentor engineers and promote verification best practices
Requirements:
• Extensive experience in mixed-signal ASIC/IP verification
• Strong expertise in PCIe and PCIe PHY techno...