Required Qualifications:

• 5+ years of EDA tools expertise in Cadence, Synopsys and/or other equivalent tools
• 4+ years of programming skills in (any of) the following languages: Python, TCL, Perl,
• Knowledge of Physical Design CAD flows/tools
• Knowledge and good understanding of RTL2GDSII physical design and sign-off flows
• Exposure to Silicon design setup/environment, various design flows and methodologies used for silicon product development