Hi, Opening for FPGA Design with HAPS. JD:- FPGA design engineer with 9yrs of exp in the following Xilinx FPGA - Versal and Ultrascale families Handling large SOC design and familiarly with VCS, Xcelium tools Proficient in Verilog/ System Verilog and Test benches. Experience in HAPS emulation - HAPS100 or HAPS200 ,protocompiler flow. Hands on experience in bring up of PCIe, SPI, I2C, DDR interfaces and strong experience in debug. Please share your resume to Regards, Jaya